Memory cell with buried digit line

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21031

Reexamination Certificate

active

07825452

ABSTRACT:
A memory cell, array and device include an active area formed in a substrate with a vertical transistor including a first end disposed over a first portion of the active area. The vertical transistor is formed as an epitaxial post on the substrate surfaces extends from the surface of the substrate, and includes a gate formed around a perimeter of the epitaxial post. A capacitor is formed on the vertical transistor and a buried digit line vertically couples to a second portion of the active area. An electronic system and method for forming a memory cell are also disclosed.

REFERENCES:
patent: 5012309 (1991-04-01), Nakayama
patent: 5057888 (1991-10-01), Fazan et al.
patent: 5469208 (1995-11-01), Dea
patent: 5497017 (1996-03-01), Gonzales
patent: 5907170 (1999-05-01), Forbes et al.
patent: 6096596 (2000-08-01), Gonzales
patent: 6177699 (2001-01-01), Perng et al.
patent: 6246719 (2001-06-01), Agarwal
patent: 6417040 (2002-07-01), Noble
patent: 6537871 (2003-03-01), Forbes
patent: 6566193 (2003-05-01), Hofmann
patent: 6608348 (2003-08-01), Kuwazawa
patent: 6610566 (2003-08-01), Forbes et al.
patent: 6624033 (2003-09-01), Noble
patent: 6689660 (2004-02-01), Noble et al.
patent: 6756625 (2004-06-01), Brown
patent: 6764901 (2004-07-01), Noble
patent: 6812512 (2004-11-01), Prall et al.
patent: 7042047 (2006-05-01), Eppich
patent: 7176513 (2007-02-01), Brown
patent: 7241655 (2007-07-01), Tang et al.
patent: 7276418 (2007-10-01), Brown
patent: 7372091 (2008-05-01), Leslie
patent: 7410856 (2008-08-01), Brown
patent: 7518174 (2009-04-01), Brown
patent: 7592218 (2009-09-01), Brown
patent: 2002/0030222 (2002-03-01), Agarwal
patent: 2002/0179956 (2002-12-01), McTeer et al.
patent: 2003/0209748 (2003-11-01), Basceri et al.
patent: 2003/0234414 (2003-12-01), Brown
patent: 2005/0104107 (2005-05-01), Fazan et al.
patent: 2006/0006444 (2006-01-01), Leslie
patent: 2007/0296017 (2007-12-01), Mawatari
patent: 2008/0099816 (2008-05-01), Brown
patent: 2009/0197379 (2009-08-01), Leslie
patent: 2009/0207649 (2009-08-01), Tang et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Memory cell with buried digit line does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory cell with buried digit line, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell with buried digit line will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4179686

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.