Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-03-18
2000-11-21
Booth, Richard
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438241, 438164, 438249, 438259, 438268, H01L 218242
Patent
active
061502103
ABSTRACT:
A memory cell for a dynamic random access memory includes a pass transistor and a storage capacitor. The transistor is a vertical transistor formed along an upper portion of a sidewall of a polysilicon-filled trench in a monocrystalline silicon body with the source and drain in the body and the source contact, gate and gate contact in the trench, with its gate dielectric being an oxide layer on the sidewall portion of the trench. The capacitor is a vertical capacitor formed along a deeper portion of the trench and has as its storage plate a lower polysilicon layer in the trench and as its reference plate a deep doped well in the body. The source contact and the storage plate are in electrical contact in the trench and the source contact and the gate contact are in the trench electrically isolated from one another.
REFERENCES:
patent: 5618745 (1997-04-01), Kita
patent: 5844266 (1998-12-01), Stengl et al.
Booth Richard
Braden Stanton
Luk Olivia
Siemens Aktiengesellschaft
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