Memory cell of nonvolatile semiconductor memory device

Details Memory cell of nonvolatile semiconductor memory device Memory cell of nonvolatile semiconductor memory device

2009-09-15

2011-10-04

Parker, Ken A (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S324000, C257SE29309

Reexamination Certificate

active

08030701

ABSTRACT:
A memory cell of a nonvolatile semiconductor memory device according to an embodiment of the invention has a MONOS structure. The charge storage layer of the memory cell includes insulating material layers. The relationship between the conduction band edge energy and valance band edge energy of the insulating material layers either increases gradually or decreases gradually from the tunnel insulating film toward the block insulating film. Furthermore, when the relative permittivity of the block insulating film is expresses as ∈r, an energy barrier between the charge storage layer and the block insulating film is equal to or larger than 4.5 ∈r−2/3(eV) and is equal to or smaller than 3.8 (eV).

REFERENCES:
patent: 7012299 (2006-03-01), Mahajani et al.
patent: 7279740 (2007-10-01), Bhattacharyya et al.
patent: 7391075 (2008-06-01), Jeon et al.
patent: 7400009 (2008-07-01), Lee et al.
patent: 7727908 (2010-06-01), Ahn et al.
patent: 7737488 (2010-06-01), Lai et al.
patent: 2008/0073704 (2008-03-01), Yasuda
patent: 2009/0078990 (2009-03-01), Yasuda
patent: 2009/0134448 (2009-05-01), Jeon et al.
patent: 2002-261175 (2002-09-01), None
patent: 2005-5715 (2005-01-01), None
patent: 2005-311379 (2005-11-01), None
Gabriel Molas, et al., “Degradation of Floating-Gate Memory Reliability by Few Electron Phenomena”, IEEE Transactions on Electron Devices, vol. 53, No. 10, Oct. 2006, pp. 2610-2619.
A. Furnémont, et al., “A Consistent Model for the SANOS Programming Operation”, Proceeding of 22ndNon-Volatile Semiconductor Memory workshop, 2007, pp. 96-97.
Yee Chia Yeo, et al., “Direct Tunneling Gate Leakage Current in Transistors with Ultrathin Silicon Nitride Gate Dielectric”, IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 540-542.
Seiichi Miyazaki, “Photoemission Study of Energy-Band Alignments and Gap-State Density Distributions for High-kgate dielectrics”, J. Vac. Sci. Technol. B. vol. 19, No. 6, Nov./ Dec. 2001, pp. 2212-2216.
H. Y. Yu, et al., “Energy Gap and Band Alignment for (HfO2)x(Al2O3)1-xon (100) Si”, Applied Physics Letters, vol. 81, No. 2, Jul. 8, 2002, pp. 376-378.
M. H. Zhang, et al., “Improved Electrical and Material Characteristics of HfTaO Gate Dielectrics with High Crystallization Temperature”, Applied Physics Letters, vol. 87, 2005, pp. 232901-1-232901-3.
S. Maikap, et al., “Band Offsets and Charge Storage Characteristics of Atomic Layer Deposited High -kHfO2/TiO2Multilayers”, Applied Physics Letters, vol. 90, 2007, pp. 262901-1-262901-3.
V. V. Afanas'ev, et al., “Band Alignment at the Interface of (100) Si with HfxTa1-xOyHigh-kDielectric Layers”, Applied Physics Letters, vol. 86, 2005, pp. 072108-1-072108-2.
J-Y. Gan, et al., “Dielectric Property of (TiO2)x-(Ta2O5)1-xThin Films”, Appl. Phys. Lett., vol. 72, No. 3, Jan. 19, 1998, pp. 332-334.
K. M. A. Salam, et al., “Effects of Additive Elements on Improvement of the Dielectric Properties of Ta2O5Films Formed by Metalorganic Decomposition”, Journal of Applied Physics, vol. 93, No. 2, Jan. 15, 2003, pp. 1169-1175.
R. J. Cava, et al., “Improvement of the Dielectric Properties of Ta2O5Through Substitution with Al2O3”, Appl. Phys. Lett., vol. 70, No. 11, Mar. 17, 1997, pp. 1396-1398.
Albert Chin, et al., “Low Voltage High Speed SiO2/AlGaN/AlLaO3/TaN Memory with Good Retention”, IEDM Tech. Dig., 2005, 4 pages.
H. J. Yang, et al., “A Program-Erasable High-kHf0.3N0.2O0.5MIS Capacitor with Good Retention”, IEEE Electron Device Letters, vol. 28, No. 10, Oct. 2007, pp. 913-915.
S. J. Wang, et al., “Effect of Nitrogen Incorporation on the Electronic Structure and Thermal Stability of HfO2Gate Dielectric”, Applied Physics Letters, vol. 88, 2006, pp. 192103-1-192103-3.
G. He, et al., “Temperature-Dependent Interfacial Chemical Bonding States and Band Alignment of HfOxNy/SiO2/Si Gate Stacks”, Applied Physics Letters, vol. 91, 2007, 232910-1-232910-3.
N. Lu, et al., “Electrical Properties of Amorphous High-kHfTaTiO Gate Dielectric With Dielectric Constants of 40-60”, IEEE Electron Device Letters, vol. 26, No. 5, May 2005, pp. 298-300.
Sheng-Chih Lai, et al., “MA BE-SONOS: A Bandgap Engineered SONOS using Metal Gate and Al2O3Blocking Layer to Overcome Erase Saturation”, Proceeding of 22ndIEEE Non-Volatile Semiconductor Memory Workshop, 2007 pp. 88-89.
S. Maikap, et al., “Very Low Voltage Operation of p-Si/Al2O3/TiO2/Al2O3/Pt Single Quantum Well Flash Memory Devices with Good Retention”, Extended Abstracts of the 2006 International Conference on Solid State Devices and Materials, 2006, pp. 582-583.

Affiliated with

Also associated with

Rating

Memory cell of nonvolatile semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory cell of nonvolatile semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell of nonvolatile semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4296386