Memory cell having conductive sill

Details Memory cell having conductive sill Memory cell having conductive sill

2005-07-05

2005-07-05

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Fet configuration adapted for use as static memory cell

C257SE27098

Reexamination Certificate

active

06914338

ABSTRACT:
A memory cell comprises a plurality of transistors. Each of the transistors include source/drain regions located in a substrate and a gate electrode located over the substrate between associated source/drain regions. The memory cell also includes at least one conductive sill contacting a source/drain region of a first one of the plurality of transistors and a gate electrode of a second one of the plurality of transistors.

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