Static information storage and retrieval – Read/write circuit – Precharge
Patent
1992-12-30
1995-01-10
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Precharge
365205, G11C 700
Patent
active
053813740
ABSTRACT:
A memory cell data output circuit includes a sense amplifier circuit having a first input terminal supplied with an output signal from memory cells, a second input terminal connected to dummy cells, and an output terminal, first switching element having a gate supplied with a control signal, for switching between the first input terminal and the ground potential, and second switching element having a gate supplied with an inverted signal of the control signal, for switching between the second input terminal and a power source potential, wherein the first and second switching elements respectively set the first and second input terminals to the ground potential and power source potential by turning on the switches in a preset period before the sense amplifier starts the sensing operation according to the control signals and turning off the switches after completion of the preset period.
REFERENCES:
patent: 4692902 (1987-09-01), Tanaka et al.
patent: 4727517 (1988-02-01), Ueno et al.
patent: 4933906 (1990-06-01), Terada et al.
patent: 4982364 (1991-01-01), Iwahashi
patent: 5007023 (1991-04-01), Kim et al.
patent: 5138579 (1992-08-01), Tatsumi et al.
Kawaai Toshimasa
Shiraishi Mikio
Kabushiki Kaisha Toshiba
LaRoche Eugene R.
Le Vu
LandOfFree
Memory cell data output circuit having improved access time does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory cell data output circuit having improved access time, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory cell data output circuit having improved access time will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-855874