Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2007-09-11
2007-09-11
Purvis, Sue A. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S060000, C257S329000, C257SE21676, C257SE21693
Reexamination Certificate
active
11162274
ABSTRACT:
The invention is directed to a memory cell on a substrate having a plurality of shallow trench isolations form therein, wherein top surfaces of the shallow trench isolations are lower than a top surface of the substrate and the shallow trench isolations together define a vertical fin structure of the substrate. The memory comprises a straddle gate, a carrier trapping layer and at least two source/drain regions. The straddle gate is located on the substrate and straddles over the vertical fin structure. The carrier trapping layer is located between the straddle gate and the substrate. The source/drain regions are located in a portion of the vertical fin structure of the substrate exposed by the straddle gate.
REFERENCES:
patent: 7075148 (2006-07-01), Hofmann et al.
patent: 7119384 (2006-10-01), Popp et al.
Ho Chia-Hua
Hsu Tzu-Hsuan
Lai Erh-Kun
Lue Hang-Ting
Jianq Chyun IP Office
MACRONIX International Co., Ltd
Purvis Sue A.
Wilson Scott R.
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