Memory cell access circuit

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S208000

Reexamination Certificate

active

07342839

ABSTRACT:
A circuit for accessing a memory cell includes a local bitline and a local sense amplifier having a plurality of transistors. The local bitline may be connect the memory cell and the sense amplifier. A first global bitline may be connected to a first one of the plurality of transistors. A second global bitline may be connected to a second one of the plurality of transistors. A secondary sense amplifier may be connected to the first and second global bitlines.

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