Memory bus termination

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S189110, C365S230080

Reexamination Certificate

active

06965529

ABSTRACT:
Methods, apparatus and machine-readable medium to terminate a memory bus line. In some embodiments, the memory bus line is terminated with one or more transistors of an output buffer that are used to drive the memory bus line during a memory write.

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