Memory arrays with integrated bit line voltage stabilization cir

Details Memory arrays with integrated bit line voltage stabilization cir Memory arrays with integrated bit line voltage stabilization cir

1997-08-08

1998-12-01

Nelms, David

Static information storage and retrieval

Read/write circuit

Precharge

262202, 262190, G11C 700

Patent

active

058448527

ABSTRACT:
The precharged bit lines of a memory array are provided with corresponding pass gate devices and a common complementary regulation and control circuitry to keep the precharged bit lines at a voltage below a first voltage and to counter-act any leakage to Vcc through a small current drain to a reference voltage. As a result, the voltage on the precharged bit lines are prevented from moving closer to Vcc, even during a prolonged idle period, and failure will not occur, when the memory cells are accessed again after the prolonged idle period.

REFERENCES:
patent: 5023841 (1991-06-01), Akrout et al.
patent: 5309401 (1994-05-01), Suzuki et al.
patent: 5365488 (1994-11-01), Matsushita
patent: 5392249 (1995-02-01), Kan
patent: 5574687 (1996-11-01), Nakase

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