Memory array with global bitline domino read/write scheme

Details Memory array with global bitline domino read/write scheme Memory array with global bitline domino read/write scheme

2008-04-08

2008-04-08

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S154000, C365S189020, C365S202000

Reexamination Certificate

active

07355881

ABSTRACT:
A circuit for implementing memory arrays using a global bitline domino read/write scheme. The memory circuit includes a plurality of cells each configured to store a bit of data. The memory circuit further includes a plurality of local bitlines, wherein each cells is coupled to one of the local bitlines. Each of the plurality of local bitlines is a differential bitline having a signal path and a complementary signal path which are cross-coupled by a pair of transistors.

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