Memory array including isolation between memory cell and...

Details Memory array including isolation between memory cell and... Memory array including isolation between memory cell and...

2007-02-27

2007-02-27

Ho, Tu-Tu (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S411000, C257S506000, C257SE29309

Reexamination Certificate

active

11137476

ABSTRACT:
A semiconductor memory device structure includes an isolation region formed along an edge of a memory cell portion adjacent to a dummy cell portion to isolate the memory cell portion from leakage current generated in the dummy cell portion.

REFERENCES:
patent: 6787860 (2004-09-01), Huang et al.
patent: 2004/0206996 (2004-10-01), Lee et al.

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