Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1980-05-29
1982-01-19
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365104, 365190, 365206, G11C 702
Patent
active
043120474
ABSTRACT:
A memory array having improved isolation between the bit sense common lines is provided by using diode connected transistors. The diode connected transistors substantially eliminate any current flow between bit sense common lines when a certain portion of the column select circuitry has not been selected. Since the blocking transistors prevent current flow there is no noise generated to be coupled to one of the control lines. This results in a memory array which can operate at higher speeds since better differential signals are established to be sensed by the sense amplifier.
REFERENCES:
patent: 4237547 (1980-12-01), Smith
Hsieh, "Read and Write for Random-Access Memory Array", IBM Tech. Disc. Bul., vol. 18, No. 6, 11/75, pp. 1849-1850.
Hecker Stuart N.
Ingrassia Vincent B.
Motorola Inc.
Myers Jeffrey Van
Sarli, Jr. Anthony J.
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