Memory and method for sensing data in a memory using...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S204000, C365S205000, C365S207000, C365S194000, C365S233100, C365S190000

Reexamination Certificate

active

08077533

ABSTRACT:
In a memory (100), a local data line pair (116, 118) is precharged to a first logic state and a global data line pair (101, 104) is precharged to a second logic state. A selected memory cell is coupled to the local data line pair (116, 118) to develop a differential local data line voltage. The differential local data line voltage is subsequently amplified to form an amplified differential local data line voltage. A selected one of the global data line pair (101, 104) is driven to the first logic state in response to the amplified differential local data line voltage to form a differential global data line voltage.

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