Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing
Patent
1992-06-05
1994-06-28
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Flip-flop used for sensing
365203, 365208, G11C 1140
Patent
active
053253353
ABSTRACT:
A sense amplifier for a static memory includes two pull-up transistors. The gate of each transistor is coupled to the drain of the other transistor. A circuitry is provided for precharging the drains of both pull-up transistors to a selected voltage such that by the start of the tracking stage of the amplifier, both pull-up transistors are off. If the tracking stage is long enough, one pull-up transistor turns on while the other one remains off, so that before the start of the sensing stage both pull-up transistors reach their final ON/OFF states. Hence the amplifier is fast and power efficient. The memory bit lines are precharged to VCC before the tracking stage, improving the read-disturb immunity and hence allowing a wider range of voltages on the bit lines and the sense amplifier inputs. The noise immunity and tolerance to temperature process variations are improved as a result. The high noise immunity make the amplifier and the memory suitable for integration with noisy circuits such as CPUs. High speed, high power efficiency, high noise immunity, high tolerance to temperature and process variations and high permissible range of bit line voltages make the memory and the amplifier suitable for low-voltage power supplies such as VCC=3.0 V supplies used in lap-top, notebook, sub-note book, and hand-held computers.
REFERENCES:
patent: 4764901 (1988-08-01), Sakurai
patent: 4804871 (1989-02-01), Walkers, Jr.
patent: 5007023 (1991-04-01), Kim et al.
patent: 5058072 (1991-10-01), Kashimura
Dense Sense Amplifier/Latch Combination, IBM Technical Disclosure Bulletin, vol. 29, No. 5, Oct., 1986, pp. 2160-2161.
Ang Michael A.
Pilling David J.
Integrated Device Technology Inc.
LaRoche Eugene R.
Le Vu A.
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