Masks for fabricating semiconductor devices and methods of...

Details Masks for fabricating semiconductor devices and methods of... Masks for fabricating semiconductor devices and methods of...

2008-01-08

2008-01-08

Lindsay, Jr., Walter (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S949000, C257SE21206, C257SE21507, C257SE21590

Reexamination Certificate

active

07316958

ABSTRACT:
Masks for fabricating a semiconductor device and methods of forming mask patterns are provided which are capable of enhancing the breakdown voltage of the fabricated semiconductor device by accurately correcting a line width pattern error of a semiconductor substrate due to a mask error during a process for forming a well ion implantation mask pattern. A disclosed mask used to manufacture a semiconductor device having complementary N-well and P-well includes: a master mask for the complementary N-well and P-well; and a light-blocking pattern on the master mask, wherein a region of the master mask, which is not a portion of the master mask adjacent to the light-blocking pattern, is etched by a predetermined thickness to have a phase shifting function.

REFERENCES:
patent: 6767824 (2004-07-01), Nallan et al.
patent: 2003/0203580 (2003-10-01), Choo et al.
patent: 2004/0029021 (2004-02-01), Garza et al.
patent: 10-2003-0054070 (2003-07-01), None

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