Mask ROM process for making a ROM with a trench shaped channel

Details Mask ROM process for making a ROM with a trench shaped channel Mask ROM process for making a ROM with a trench shaped channel

1994-06-01

1997-05-06

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438278, 438282, 438291, H01L 21265

Patent

active

056270917

ABSTRACT:
A memory cell, and process for making it, having a long channel and narrow buried bit line is disclosed. The memory cell is formed in a substrate having a first dopant type. A trench is defined in the substrate. Source/drain regions of a second dopant type are formed on the surface of the substrate to each side of the trench. A gate oxide layer is formed over the substrate and a polysilicon wordline deposited over the gate oxide layer. A channel is defined along the walls of the trench. Ions are implanted in the bottom of the trench defining the channel for a cell that is selected to be in the off state. The long channel and narrow bit line of these memory cells overcome the problem of high bit line resistance and low junction breakdown voltage found in conventional memory cells.

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