Mask ROM and fabrication thereof

Details Mask ROM and fabrication thereof Mask ROM and fabrication thereof

2006-06-20

2006-06-20

Owens, Douglas W. (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S275000

Reexamination Certificate

active

07064035

ABSTRACT:
A Mask ROM and a method for fabricating the same are described. The Mask ROM comprises a substrate, a plurality of gates on the substrate, a gate oxide layer between the gates and the substrate, a plurality of buried bit lines in the substrate between the gates, an insulator on the buried bit lines and between the gates, a plurality of word lines each disposed over a row of gates perpendicular to the buried bit lines, and a coding layer between the word lines and the gates.

REFERENCES:
patent: 6713315 (2004-03-01), Kuo et al.
patent: 06-013628 (1994-01-01), None
patent: 07-045797 (1995-02-01), None
patent: 08-162547 (1996-06-01), None
patent: 2870478 (1999-01-01), None
patent: 2000-514946 (2000-11-01), None
patent: 2001-077219 (2001-03-01), None
patent: 2001-077220 (2001-03-01), None
Chen, J. T-Y. et al. (2000). “A New Dual Floating Gate Flash Cell for Multilevel Opertion,”Extended Abstracts of the 2000 International Conference on Solid State Devices and Materials, Abstract C-5-4, ppg. 282-283.

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