Mask for crystallizing polysilicon and a method for forming...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor

Reexamination Certificate

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C438S487000, C257S098000, C257SE21133, C260SDIG035

Reexamination Certificate

active

10495673

ABSTRACT:
A mask for forming polysilicon has a first slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a second slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, a third slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width, and a fourth slit region where a plurality of horizontal slit patterns are arranged in the vertical direction while bearing the same width. The slit patterns arranged at the first to fourth slit regions are sequentially enlarged in width in the horizontal direction in multiple proportion to the width d of the slit pattern at the first slit region. The centers of the slit patterns arranged at the first to fourth slit regions in the horizontal direction are placed at the same line. The slit patterns arranged at the respective slit regions in the vertical direction are spaced from each other with a distance of 8*d. Alternatively, the first to fourth slit regions may be arranged in reverse order, or in the vertical direction.

REFERENCES:
patent: 6326286 (2001-12-01), Park et al.
patent: 2001/0028985 (2001-10-01), Wang et al.
patent: 2004/0144988 (2004-07-01), Jung
patent: 2005/0151146 (2005-07-01), Lee et al.
patent: 2005/0173752 (2005-08-01), Chung et al.

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