Manufacturing process of a split gate flash memory unit

Details Manufacturing process of a split gate flash memory unit Manufacturing process of a split gate flash memory unit

1996-12-30

2000-07-04

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438266, 438591, H01L 218247

Patent

active

060837926

ABSTRACT:
A manufacturing process of a split gate flash memory unit is disclosed. The manufacturing process includes: (a) providing a silicon substrate having a first insulating layer, and forming a first conductive layer on said first insulating layer; (b) removing part of the first conductive layer to expose left and right sidewalls of said first conductive layer and part of the first insulating layer; (c) forming a second insulating layer on left and right sidewalls of said first conductive layer; (d) performing an oxidation process to form a third insulating layer on said first conductive layer, said second insulating layer, and said other part area of said first insulating layer, wherein by an isolation effect provided by said second insulating layer a leaking phenomenon at left and right lower edges of said first conductive layer is reduced; and (e) forming a second conductive layer on said third insulating layer to form said split gate flash memory unit.

REFERENCES:
patent: 5153143 (1992-10-01), Schlais et al.
patent: 5395778 (1995-03-01), Walker
patent: 5585293 (1996-12-01), Sharma et al.
Wolf, "Silicon Processing for the VLSI Era", vol. 1: Process Technology; pp. 182-184, 1990.
"Improved Performance and Reliability of Split Gate Source-Side Injected Flash Memory Cells", by Surya Bhattacharya et al., from IEDM 96' p. 339.

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