Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-04-17
2007-04-17
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S212000, C257S330000
Reexamination Certificate
active
11035700
ABSTRACT:
The present invention provides a manufacturing process and the structure of an integrated circuit. In one embodiment, one polysilicon layer deposition and one polysilicon layer etching are used to form the gate of a trench device and the polysilicon layer of a planar device simultaneously. The present invention not only has overcome the problem of the electric leakage, but also has the advantages of withstanding a higher voltage, reducing the relevant cost and increasing the yields. The present invention possesses the outstanding technical features in the field of the power device.
REFERENCES:
patent: 6710406 (2004-03-01), Mo et al.
patent: 7005351 (2006-02-01), Henninger et al.
Chang Chien-Ping
Hsieh Hsin-Huang
Tseng Mao-Song
Yuan Tien-Min
Dang Phuc T.
Mosel Vitelic Inc.
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