Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-27
2006-06-27
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S211000
Reexamination Certificate
active
07067374
ABSTRACT:
Dual spacer structures are fabricated such that sidewall spacers in a cell region are thinner than sidewall spacers in a periphery region. The fabricating method of memory includes forming a stop layer over the first semiconductor feature and the second semiconductor feature in cell region and periphery region. A spacer layer is formed over the stop layer in the periphery region. The spacer layer is patterned to form a spacer on a sidewall of the second semiconductor feature. An etching process is performed to form a resultant spacer on an interior sidewall of the opening between first semiconductor features. The stop layer on top surfaces of the first and second semiconductor features is removed.
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Chen Ming Shang
Chen Yin Jen
Han Tzung Ting
Goodwin David
Haynes Mark
Haynes Beffel & Wolfeld
Macronix International Co. Ltd.
Nelms David
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