Manufacturing method of semiconductor memory device having a tre

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Details

438243, 438253, H01L 21336, H01L 218242

Patent

active

060636696

ABSTRACT:
A manufacturing method provides a semiconductor device having a trench gate type transistor and a planer type transistor gate electrodes are formed certainly and without increasing the number of photolithography steps. After formation of a gate insulating film, a polysilicon film, and a WSi film for a transistor in a peripheral circuit section, an oxide film is formed on the entire surface of the resultant structure. Subsequently, the oxide film in a trench formation region is selectively removed in a memory cell array section and the oxide film other than a gate electrode formation region is selectively removed in the peripheral circuit section. A silicon substrate is etched using the remaining oxide film as a mask to form a trench in the memory cell array section, and the polysilicon film and the WSi film are etched to form the gate electrode in the peripheral circuit section. Thereafter, a gate insulating film and a gate electrode for a cell transistor are formed in the trench of the memory cell array section.

REFERENCES:
patent: 5283201 (1994-02-01), Tsang et al.

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