Manufacturing method of semiconductor integrated circuit device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S305000, C438S308000

Reexamination Certificate

active

07098111

ABSTRACT:
A manufacturing technology of a MOSFET having a shallow junction and a source and drain of a low resistance is provided. After having ion-implanted an As on the surface of a p type well forming a gate electrode, a surface protection layer and an energy absorber layer are deposited on a substrate. When the surface of the substrate is irradiated by a YAG laser beam of the wavelength of 1064 nm for one nano second to 999 nano seconds, a heat absorbed by the energy absorber layer is transmitted to the substrate in an ultra short time, and heats its surface to a melting temperature, and therefore, the impurity is activated, and an extension region of a low resistance is formed in an extremely shallow region of about 20 nm in depth from the surface of the p type well.

REFERENCES:
patent: 5956603 (1999-09-01), Talwar et al.
patent: 6380044 (2002-04-01), Talwar et al.
patent: 2004/0132293 (2004-07-01), Takayama et al.
patent: 2004/0245583 (2004-12-01), Horiuchi et al.
patent: 2001-189458 (2001-07-01), None
patent: 2002-050766 (2002-02-01), None

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