Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-03-30
1998-07-07
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438270, 438271, 438700, 438710, H01L 21336
Patent
active
057768129
ABSTRACT:
A manufacturing method of a MOSFET having a channel part on the side surface of a groove, which does not permit the introduction of defects or contaminant into the channel part and which can make the shape of the groove uniform. An n.sup.- -type epitaxial layer having a low impurity concentration is formed on a main surface of an n.sup.+ -type semiconductor substrate. This surface is specified as a main surface, and chemical dry etching is applied to a specified region of this main surface. A region including a surface generated by the chemical dry etching is selectively oxidized to form a selective oxide film to a specified thickness. Following this process, p-type and n-type impurities are doubly diffused from the main surface to define the length of the channel and form a base layer and a source layer. Furthermore, the n.sup.+ -type semiconductor substrate is specified as a drain layer. After the double diffusion, a gate electrode is formed through a gate oxide film and a source electrode and a drain electrode are formed.
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Kataoka Mitsuhiro
Takahashi Shigeki
Takeuchi Yuuchi
Tokura Norihito
Yamamoto Tsuyoshi
Nguyen Tuan H.
Nippondenso Co. Ltd.
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