Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-15
2011-11-01
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S238000, C438S381000, C438S680000, C438S706000, C257SE21006, C257SE21027, C257SE21029, C257SE21170, C257SE21229, C257SE21267, C257SE21645, C257SE21646
Reexamination Certificate
active
08048735
ABSTRACT:
The present invention provides an MIM capacitor using a high-k dielectric film preventing degradation of breakdown field strength of the MIM capacitor and suppressing the increase of the leakage current. The MIM capacitor comprises a first metal interconnect, a fabricated capacitance film, a fabricated upper electrode, and a third metal interconnect. The MIM capacitor is realized by forming an interlayer dielectric film comprising silicon oxide so as to cover the first metal interconnect, then forming a first opening in the interlayer dielectric film to a region corresponding to a via hole layer in the interlayer dielectric film just above the first metal interconnect so as not to expose the upper surface of the first metal interconnect, then forming a second opening to the inside of the first opening so as to expose the surface of the first metal interconnect and then forming a capacitance film and a third metal interconnect.
REFERENCES:
patent: 7586143 (2009-09-01), Watanabe
patent: 2004/0079980 (2004-04-01), Hieda
patent: 2004/0135186 (2004-07-01), Yamamoto
patent: 2004-152796 (2004-05-01), None
patent: 2004-214304 (2004-07-01), None
Fujiwara Tsuyoshi
Imai Toshinori
Takeda Ken'ichi
Hitachi , Ltd.
Miles & Stockbridge P.C.
Nhu David
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