Manufacturing method of self-aligned silicide load for static ra

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438381, 438649, H01L 218244

Patent

active

058541039

ABSTRACT:
A self-aligned suicide SRAM load structure and its manufacturing method comprising the steps of providing a semiconductor substrate; then forming a first insulating layer over the substrate and etching an opening. Thereafter, a polysilicon layer is formed over the first insulating layer and the opening, and then a second insulating layer is formed over the polysilicon layer. Next, a photoresist layer for creating a connector pattern is formed over the second insulating layer using microlithographic processes. The second insulating layer is then etched to expose portions of the polysilicon layer. Subsequently, a metallic layer is deposited over the exposed polysilicon layer and the second insulating layer. Then, the metallic layer reacts with the polysilicon layer through heating until the two layers are completely converted into a metal silicide layer. The metal silicide layer functions as connectors, and the unreacted polysilicon layer beneath the second insulating layer functions as a polysilicon load.

REFERENCES:
patent: 4551907 (1985-11-01), Mukai
patent: 5330930 (1994-07-01), Chi

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