Manufacturing method of a semiconductor device having...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S210000, C438S221000, C438S230000, C438S238000, C438S296000, C438S581000, C438S583000, C438S655000, C257S068000, C257S071000, C257S073000, C257S202000, C257S296000, C257S301000, C257S365000, C257S412000, C257S413000, C257SE27084, C257SE21646

Reexamination Certificate

active

08043912

ABSTRACT:
A semiconductor device is provided with a semiconductor substrate comprising element isolation regions and an element region surrounded by the element isolation regions, a first polysilicon layer formed in the element region of the semiconductor substrate, an element-isolating insulation film formed in the element isolation region of the semiconductor substrate, a second polysilicon layer formed on the element-isolating insulation film, a first silicide layer formed on the first polysilicon layer. And the device further comprising a second silicide layer formed on the second polysilicon layer and being thicker than the first silicide layer.

REFERENCES:
patent: 5686746 (1997-11-01), Iwasa
patent: 5798545 (1998-08-01), Iwasa et al.
patent: 6040606 (2000-03-01), Blair
patent: 6323082 (2001-11-01), Furukawa et al.
patent: 6630721 (2003-10-01), Ligon
patent: 2004/0004257 (2004-01-01), Lee et al.
patent: 2004/0029348 (2004-02-01), Lee
patent: 2004/0183111 (2004-09-01), Shinkawata
patent: 2005/0042831 (2005-02-01), Mehrotra
patent: 2005/0077563 (2005-04-01), Alsmeier
patent: 2006/0076603 (2006-04-01), Matsuda
patent: 2007/0069267 (2007-03-01), Matsuda
patent: 8-241988 (1996-09-01), None
patent: 2003-100748 (2003-04-01), None
N. Yanagiya et al., “65nm CMOS Technology (CMOS5) with High Density Embedded Memories for Broadband Microprocessor Applications”, IEDM Tech Digest, 2002.
Y. Matsubara et al., “Fully Compatible Integration of High Density Embedded DRAM with 65nm CMOS Technology (CMOS5)”, IEDM Tech Digest, 2002.

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