Manufacturing method for semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S253000, C438S393000, C438S396000

Reexamination Certificate

active

06319763

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method for a semiconductor device and, more particularly, to a manufacturing method for a semiconductor device provided with a capacitor on an interlayer dielectric, the capacitor comprising a silicon nitride film serving as a capacitor dielectric film.
2. Description of Related Art
In recent years, semiconductor memory devices employ silicon nitride films as capacitor dielectric films in order to increase capacitance of capacitors. In order to take full advantage of using silicon nitride films, a process for forming a silicon nitride film is sometimes employed, wherein a lower electrode composed of a silicon type material, typically a polycrystalline silicon material, is first formed on an interlayer dielectric, then this specimen is placed in a deposition chamber to be subjected to pretreatment in which the specimen is subjected to heat in an ammonia gas atmosphere in the deposition chamber, the pressure of which has been reduced (this pretreatment will be hereinafter referred to as “in-situ surface nitriding (ISN)”). Then, an ammonia gas and a gas for forming a silicon type thin film are introduced into the deposition chamber to form a silicon nitride film on the lower electrode and the interlayer dielectric. The reduced pressure CVD method is employed as a typical method for forming the silicon nitride film after the ISN treatment is finished.
A native oxide produced on the lower electrode is reduced and thermally nitrided during the ISN treatment. Thus, a silicon nitride film by the ISN is formed on a surface of the lower electrode. This provides an advantage in that a chance for an oxide film to be produced between the lower electrode and the silicon nitride film produced by the CVD method is minimized, permitting an advantage of using the silicon nitride film as a capacitor dielectric film to be easily obtained.
Generally, in the process mentioned above, a heat treatment known as “healing oxidation” is carried out on the silicon nitride film, which has been formed, so as primarily to repair defects or the like of the film.
However, according to experiments performed by the inventors of the present application have revealed that a portion of the silicon nitride film that is formed on the interlayer dielectric tends to be thinner than another portion that is formed on the lower electrode in the foregoing process including the ISN treatment. It has also been found that the thickness is considerably influenced by the degree of vacuum in a deposition chamber in the ISN treatment.
SUMMARY OF THE INVENTION
An object of the present invention is to prevent abnormal oxidization of an electrode, wiring, etc. under an interlayer dielectric attributable to heat treatment or the like after silicon nitride film is formed as a capacitor dielectric film.
To this end, according to the present invention, there is provided a manufacturing method for a semiconductor device that has a capacitor electrode comprising a silicon nitride film as a capacitor dielectric film, including the steps of forming a lower electrode on an interlayer dielectric, and carrying out reduction and thermal nitriding on a specimen, on which the foregoing lower electrode has been formed, in an ammonia gas atmosphere in a deposition chamber wherein pressure has been reduced to a range from 533 Pa (4 torr; 1 torr is about 133.3 Pa. The same applies hereinafter.) to 1333 Pa. The range of the pressure of 533 Pa or more includes any value in a range of 483 Pa or more and below 533 Pa, taking a margin of 50 Pa into account.


REFERENCES:
patent: 4621277 (1986-11-01), Ito et al.
patent: 4623912 (1986-11-01), Chang et al.
patent: 5250456 (1993-10-01), Bryant
patent: 5290729 (1994-03-01), Hayashide et al.
patent: 5397748 (1995-03-01), Watanabe et al.
patent: 5478765 (1995-12-01), Kwong et al.
patent: 5629043 (1997-05-01), Inaba et al.

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