Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-04-22
2008-04-22
Pizarro, Marcos D. (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S938000, C257SE21182, C257SE21207
Reexamination Certificate
active
11346870
ABSTRACT:
The invention includes non-volatile memory and logic devices associated with crystalline Si/Ge. The devices can include TFT constructions. The non-volatile devices include a floating gate or floating plate over the Si/Ge, and a pair of source/drain regions. The source/drain regions can extend into the Si/Ge. The memory or logic devices further include an insulative material over the floating gate or plate, and a control gate separated from the floating gate or plate by the insulative material. The crystalline Si/Ge can have a relaxed crystalline lattice, and a crystalline layer having a strained crystalline lattice can be formed between the relaxed crystalline lattice and the floating gate or plate. The devices can be fabricated over any of a variety of substrates. The floating plate option can provide lower programming voltage and orders of magnitude superior endurance compared to other options.
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Micro)n Technology, Inc.
Pizarro Marcos D.
Wells St. John P.S.
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