Manufacturing method a flash memory cell array

Details Manufacturing method a flash memory cell array Manufacturing method a flash memory cell array

2007-01-23

2007-01-23

Chaudhari, Chandra (Department: 2891)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S596000, C257SE21690

Reexamination Certificate

active

10907829

ABSTRACT:
A flash memory cell array comprises a substrate, a string of memory cell structures and source region/drain region. Each of memory cell structures includes a stack gate structure including a select gate dielectric layer, a select gate and a gate cap layer formed on the substrate; a spacer is set on the sidewall of the select gate; a control gate connected to the stack gate structure is set on the one side of the stack gate structure; a floating gate is set between the control gate and the substrate; an inter-gate dielectric layer is set between the control gate and the floating gate; and a tunneling dielectric layer is set between the floating gate and the substrate. The source region/drain region is set in the substrate near outer control gate and stack gate structure of the flash memory cell array.

REFERENCES:
patent: 5830794 (1998-11-01), Kusunoki et al.
patent: 6261903 (2001-07-01), Chang et al.
patent: 2004/0185615 (2004-09-01), Ding

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