Manufacturing an integrated circuit with low solubility...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S622000, C438S625000, C438S633000, C438S687000

Reexamination Certificate

active

06841473

ABSTRACT:
A manufacturing method for an integrated circuit is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer formed on the semiconductor substrate. A channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening. A conductor core fills the opening over the barrier layer. A cerium-conductor interconnect cap is disposed over the conductor core with a capping layer over the dielectric layer and the cerium-conductor interconnect cap.

REFERENCES:
patent: 6358840 (2002-03-01), Wang et al.
patent: 6387806 (2002-05-01), Wang et al.
patent: 6525425 (2003-02-01), Woo et al.
patent: 6566262 (2003-05-01), Rissman et al.

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