Manufacture of MOSFET having LDD source/drain region

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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H01L 213205

Patent

active

060048522

ABSTRACT:
An LDD source/drain region is manufactured adjacent a gate electrode using a single ion implantation step. The method begins by providing a polysilicon gate electrode on a gate oxide over a substrate and then providing a thin, layer of CVD oxide over the gate electrode and over the substrate. A thicker, second layer of a material different from the first silicon oxide layer is deposited over the device and is etched back to form sidewall spacer structures alongside and spaced slightly from the gate electrode. The spacer structures formed from the second layer are then used as a mask to etch the oxide layer where it is exposed over the active regions of the substrate and then the spacer structures are removed. The portion of the oxide layer that remains over the top and sides of the gate electrode and over portions of the substrate adjacent the gate electrode is then used as a mask for an ion implantation process. Implantation through the mask forms a more lightly doped and more shallowly doped region in the substrate beneath the mask and a more heavily doped and more deeply doped region in the portions of the source/drain regions that were not covered by the mask. Accordingly, implantation through the mask formed in this way forms a complete source/drain region having a lightly doped drain structure alongside the FET of the integrated circuit device. Formation of LDD source/drain regions in this manner saves a number of manufacturing steps, resulting in reduced turn around time and reduced costs.

REFERENCES:
patent: 4784965 (1988-11-01), Woo et al.
patent: 4818714 (1989-04-01), Haskell
patent: 4981810 (1991-01-01), Fazan et al.
patent: 5200351 (1993-04-01), Hadjizadeh-Amini
patent: 5272100 (1993-12-01), Satoh et al.
patent: 5391508 (1995-02-01), Matsuoka et al.

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