Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-09-12
2006-09-12
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C365S158000, C365S230030
Reexamination Certificate
active
07107507
ABSTRACT:
A magnetoresistive solid-state storage device (MRAM device) uses storage cells16arranged in many arrays10to form a macro-array2.For fast access times and to reduce exposure to physical failures, each unit of data (e.g. a sector) is stored with a few sub-units (e.g. bytes) in each of a large plurality of the arrays10.Advantageously, the plurality of arrays10are accessible in parallel substantially simultaneously, and a failure in any one array affects only a small portion of the data unit. Optionally, error correction coding (ECC) is employed to form encoded data with symbols which are stored according to preferred embodiments which further minimise exposure to physical failures.
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Davis James Andrew
Jedwab Jonathan
Morley Stephen
Paterson Kenneth Graham
Lamarre Guy
Tabone, Jr. John J.
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