Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-05-24
2005-05-24
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C360S324200
Reexamination Certificate
active
06897532
ABSTRACT:
A method for forming a magnetic tunneling junction (MJT) is provided. In some embodiments, the method may include patterning one or more magnetic layers to form an upper portion of a MTJ. The method may further include patterning one or more additional layers to form a lower portion of the MTJ. In some cases, the lower portion may include a tunneling layer of the MTJ having a width greater than the upper portion. In addition, in some embodiments the method may further include patterning an electrode below the lower portion. In some cases, the electrode may include a lowermost layer with a thickness equal to or less than approximately 100 angstroms. In addition or alternatively, the electrode may have a width greater than the width of the tunneling layer. In yet other embodiments, the method may include forming spacers along the sidewalls of the upper and/or lower portions.
REFERENCES:
patent: 5659499 (1997-08-01), Chen et al.
patent: 5804458 (1998-09-01), Tehrani et al.
patent: 5841692 (1998-11-01), Gallagher et al.
patent: 5904459 (1999-05-01), Prathap et al.
patent: 5907459 (1999-05-01), Shouji et al.
patent: 6110751 (2000-08-01), Sato et al.
patent: 6219274 (2001-04-01), Shimazawa et al.
patent: 6358756 (2002-03-01), Sandhu et al.
patent: 6365419 (2002-04-01), Durlam et al.
patent: 6485989 (2002-11-01), Signorini
patent: 6518071 (2003-02-01), Durlam et al.
patent: 6555858 (2003-04-01), Jones et al.
patent: 6562634 (2003-05-01), Bronner et al.
patent: 6587371 (2003-07-01), Hidaka
patent: 6617658 (2003-09-01), Kajiyama
patent: 6656371 (2003-12-01), Drewes
patent: 20020034094 (2002-03-01), Saito et al.
patent: 20020036315 (2002-03-01), Adachi et al.
patent: 20020055016 (2002-05-01), Hiramoto et al.
patent: 20020122338 (2002-09-01), Park et al.
patent: 20020132464 (2002-09-01), Lee
patent: 20020135950 (2002-09-01), Zhang et al.
patent: 20020145835 (2002-10-01), Suzuki et al.
patent: 20020186514 (2002-12-01), Childress et al.
patent: 20030059958 (2003-03-01), Drewes
patent: 20030090844 (2003-05-01), Shimizu et al.
patent: 57-42147 (1982-03-01), None
patent: 4-3305 (1992-01-01), None
patent: 11-134620 (1999-05-01), None
patent: 2001-84526 (2001-03-01), None
patent: 2001-267524 (2001-09-01), None
patent: WO 0241367 (2002-05-01), None
Ounadjela Kamel
Schwarz Benjamin C. E.
Cypress Semiconductor Corp.
Daffer McDaniel LLP
Duffer Kevin L.
Flynn Nathan J.
Lettang Mollie E.
LandOfFree
Magnetic tunneling junction configuration and a method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Magnetic tunneling junction configuration and a method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Magnetic tunneling junction configuration and a method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3383159