Magnetic RAM and array architecture using a two transistor,...

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S171000, C365S173000

Reexamination Certificate

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10366499

ABSTRACT:
A new magnetic RAM cell device is achieved. The device comprisese, first, a MTJ cell comprising a free layer and a pinned layer separated by a dielectric layer. A reading switch is coupled between the free layer and a reading line. A writing switch is coupled between a first end of the pinned layer and a first writing line. A second end of the pinned layer is coupled to a second writing line. Architectures using MRAM cells are disclosed.

REFERENCES:
patent: 6166948 (2000-12-01), Parkin et al.
patent: 6304477 (2001-10-01), Naji
patent: 6331943 (2001-12-01), Naji et al.
patent: 6335890 (2002-01-01), Reohr et al.
patent: 6418046 (2002-07-01), Naji
patent: 6781871 (2004-08-01), Park et al.
patent: 6791865 (2004-09-01), Tran et al.
patent: 6909628 (2005-06-01), Lin et al.

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