LSI package and manufacturing method thereof

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

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257697, 361748, H01L 2144, H01L 2148, H01L 2150

Patent

active

061534471

ABSTRACT:
In an LSI package, terminal resistance elements are formed of resistive paste which, consisting of a mixture of fine powder of either oxidized metal or carbon and fine powder of glass, is buried and sintered in a ceramic wiring board in the direction to penetrate it. Front side wiring, connecting the parts of the terminal resistance elements exposed on the front face of the ceramic wiring board to input/output circuits of the LSI chip to be mounted on the front face of the ceramic wiring board, is formed on the front face of the ceramic wiring board and in the top layer of the ceramic wiring board. Back side wiring, connecting the parts of the terminal resistance elements exposed on the back face of the ceramic wiring board to a voltage clamp wiring network, is formed on the back face of the ceramic wiring board.

REFERENCES:
patent: 4221047 (1980-09-01), Narken et al.
patent: 4407007 (1983-09-01), Desai et al.
Patent Abstracts of Japan, Publication No. 57097660, Mukai Makoto, Jun. 21, 1982.
Patent Abstracts of Japan, Publication No. 01161801, Kikuchi Teruo, Jun. 26, 1989.
Patent Abstracts of Japan, Publication No. 01196198, Kon Taichi, Aug. 7, 1989.
Patent Abstracts of Japan, Publication No. 01119047, Misawa Hiroyuki, May 11, 1989.
R. Tummala et al, Microelectronics Packaging Handbook, 1989, vol. 2 Van Nostrand Reinhold, pp. 786-790.

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