Low voltage to high voltage level shifter and related methods

Electronic digital logic circuitry – Interface – Logic level shifting

Reexamination Certificate

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Details

C326S081000, C326S083000

Reexamination Certificate

active

07112995

ABSTRACT:
A shifter circuit comprises a high and low voltage buffer stages and an output buffer stage. The high voltage buffer stage comprises multiple transistors arranged in a transistor stack having a plurality of intermediate nodes connecting individual transistors along the stack. The transistor stack is connected between a voltage level being shifted to and an input voltage. An inverter of this stage comprises multiple inputs and an output. Inverter inputs are connected to a respective intermediate node of the transistor stack. The low voltage buffer stage has an input connected to the input voltage and an output, and is operably connected to the high voltage buffer stage. The low voltage buffer stage is connected between a voltage level being shifted away from and a lower voltage. The output buffer stage is driven by the outputs of the high voltage buffer stage inverter and the low voltage buffer stage.

REFERENCES:
patent: 5684415 (1997-11-01), McManus
patent: 5786711 (1998-07-01), Choi
patent: 5896045 (1999-04-01), Siegel et al.
patent: 5995010 (1999-11-01), Blake et al.
patent: 6040708 (2000-03-01), Blake et al.
patent: 6184716 (2001-02-01), Depetro et al.
patent: 6487687 (2002-11-01), Blake et al.

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