Low voltage semiconductor memory device

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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Details

C365S189090, C365S189110, C365S207000

Reexamination Certificate

active

07417910

ABSTRACT:
A semiconductor memory device having a cell array area for reading or storing data, including: a normal cell block including a plurality of normal cells, each being coupled to one of a bit line and a bit line bar for storing a data; a reference cell block including a plurality of reference cell units, each including a reference capacitor, a first reference metal oxide semiconductor (MOS) transistor for connecting the reference capacitor to the bit line, and a second reference MOS transistor for connecting the reference capacitor to the bit line bar; and a third reference MOS transistor coupled to the reference cell block for charging the reference capacitor with a reference voltage.

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