Low voltage non-volatile memory transistor

Details Low voltage non-volatile memory transistor Low voltage non-volatile memory transistor

2006-04-11

2006-04-11

Smith, Bradley K. (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S413000, C257S529000, C257S757000, C257S904000, C438S132000, C438S281000, C438S467000, C365S096000, C365S104000, C365S177000

Reexamination Certificate

active

07026692

ABSTRACT:
A p-channel non-volatile memory (NVM) transistor is programmed by shifting the threshold voltage of the transistor. The threshold voltage is shifted by introducing a programming current to the gate electrode of the transistor, and simultaneously introducing a negative bias to the transistor. The threshold voltage of the p-channel NVM transistor is shifted in response to the negative bias condition and the heat generated by the programming current. The high temperature accelerates the threshold voltage shift. The threshold voltage shift is accompanied by an agglomeration of material in the gate electrode. The agglomeration of material in the gate electrode is an indication of the high temperature reached during programming. The threshold voltage shift of the p-channel NVM transistor is permanent.

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