Low voltage memory

Details Low voltage memory Low voltage memory

1994-04-29

1996-04-16

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257315, 257321, 257325, H01L 2976

Patent

active

055085431

ABSTRACT:
A floating gate is inserted into the gate stack of an EEPROM cell. For an N channel EEPROM device, the floating gate is composed of a material having a conduction band edge (or fermi energy in the case of a metal or composite that includes a metal) at least one and preferably several kT electron volts below the conduction band edge of the channel region. The floating gate material thus has a larger electron affinity than the material of the channel region. This allows the insulator separating the floating gate and the channel to be made suitable thin (less than 100 angstroms) to reduce the writing voltage and to increase the number of write cycles that can be done without failure, without having charge stored on the floating gate tunnel back out to the channel region during read operations. For a P channel EEPROM device, the floating gate is composed of a material having a valence band edge (or fermi energy in the case of a metal or a composite that includes a metal) at least one and preferably several kT (eV) above the valence band edge of the channel region.

REFERENCES:
patent: 3856587 (1974-12-01), Yamazaki et al.
patent: 4115914 (1978-09-01), Harari
patent: 4507673 (1985-03-01), Aoyama et al.

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