Low stress sacrificial cap layer

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C257SE21120, C257S305000

Reexamination Certificate

active

07994073

ABSTRACT:
A low stress sacrificial cap layer120having a silicon oxide liner film130, a low stress silicon film140, and a silicon nitride film. Alternatively, a low stress sacrificial cap layer410having a silicon oxide liner film130and a graded silicon nitride film420. Also, methods300, 500for fabricating a transistor20, 400having a low stress sacrificial cap layer120, 410.

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Chen et al., Stress Memorization Technique (SMT) by Selectively Strained-Nitride Capping for Sub-65nm High Performance Strained-Si Device Applications, 2004 Symposium on VLSI Technology Digest of Technical Papers, pp. 56-57.

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