Low resistance interconnect for a semiconductor device and metho

Details Low resistance interconnect for a semiconductor device and metho Low resistance interconnect for a semiconductor device and metho

1998-08-14

1999-12-21

Everhart, Caridad

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438627, 438653, 438688, 438656, H01L 21441

Patent

active

06004876&

ABSTRACT:
The present invention provides a structure and a method for formation of interconnect having a barrier layer, aluminum layer on the barrier layer, a reaction prevention layer on the aluminum layer, an antireflective coating layer on the reaction prevention layer, a dielectric layer, a via, a conductive plug, and another aluminum layer on the via and the dielectric layer. This structure prevents interconnects from contact resistance failure caused by an aluminum nitride film AlF, a titanium fluorine film Ti.sub.x F, aluminum overetching, and aluminum consumption. As a result of this invention, via electro-migration and aluminum line electromigration characteristics are improved in semiconductor devices.

REFERENCES:
patent: 4820611 (1989-04-01), Arnold, III et al.
patent: 5360995 (1994-11-01), Graas
patent: 5582881 (1996-12-01), Besser et al.
patent: 5604155 (1997-02-01), Wang
patent: 5747388 (1998-05-01), Kusters et al.
patent: 5747879 (1998-05-01), Rastogi et al.
patent: 5931141 (1999-06-01), Bothra

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