Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2011-07-19
2011-07-19
Barnie, Rexford N (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S068000, C326S087000
Reexamination Certificate
active
07982501
ABSTRACT:
Low-power routing multiplexers that reduce static and dynamic power consumption are provided. A variety of different techniques are used to reduce power consumption of the routing multiplexers without significantly increasing their size. For example, power consumption of the routing multiplexers may be reduced by reducing short-circuit currents, reducing leakage currents, limiting voltage swing, and recycling charge within the multiplexer. Multiple power reduction techniques may be combined into a single routing multiplexer design. Low-power routing multiplexers may also be designed to operate in selectable modes, such as, a high-speed, high-power mode and a low-speed, low-power mode.
REFERENCES:
patent: 4890016 (1989-12-01), Tanaka et al.
patent: 4906870 (1990-03-01), Gongwer
patent: 5081374 (1992-01-01), Davis
patent: 5367206 (1994-11-01), Yu et al.
patent: 5719506 (1998-02-01), Diba et al.
patent: 5760601 (1998-06-01), Frankeny
patent: 5781034 (1998-07-01), Rees et al.
patent: 5920210 (1999-07-01), Kaplinsky
patent: 5929680 (1999-07-01), Lim
patent: 6262703 (2001-07-01), Perner
patent: 6323675 (2001-11-01), Whitworth et al.
patent: 6326811 (2001-12-01), Coddington et al.
patent: 6437611 (2002-08-01), Hsiao et al.
patent: 6693785 (2004-02-01), Cordier et al.
patent: 6768335 (2004-07-01), Young et al.
patent: 6970015 (2005-11-01), Chan et al.
patent: 7084662 (2006-08-01), Om et al.
patent: 7167020 (2007-01-01), Allan
patent: 7215141 (2007-05-01), Lewis
patent: 7274209 (2007-09-01), Reinschmidt
patent: 2002/0141234 (2002-10-01), Kaviani
patent: 2006/0158213 (2006-07-01), Allan
patent: 1340243 (2002-03-01), None
Ciccarelli, Luca et al. “Low Leakage Circuit Design for FPGAs,” (unpublished) submitted to the 2004 IEEE Custom Integrated Circuits Conference, Orlando, Florida, Oct. 2004.
Anderson, Jason et al., “A Novel Low-Power FPGA Routing Switch” (2004) (unpublished) submitted to the 2004 IEEE Custom Integrated Circuits Conference, Orlando, Florida, Oct. 2004.
Anderson, Jason et al., “Low-Power Programmable Routing Vircuitry for FPGAs” (2004) (unpublished) submitted to the 2004 International Conference on Computer Aided Design, San Jose, California, Nov. 2004.
Altera Corporation
Barnie Rexford N
Hammond Crystal L
Ropes & Gray LLP
LandOfFree
Low-power routing multiplexers does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Low-power routing multiplexers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low-power routing multiplexers will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2719539