Low power ROM architecture

Details Low power ROM architecture Low power ROM architecture

2006-10-24

2006-10-24

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S204000, C365S205000

Reexamination Certificate

active

07126866

ABSTRACT:
In a ROM structure, power consumption is reduced by providing for pre-discharging of only the bit line corresponding to the memory location that is being read. Column select lines are coupled to logic to switch in a pre-discharging circuit prior to reading, and to disconnect, from the pre-discharging circuit during reading, only the bit line corresponding to the memory location being read.

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