Low power consumption semiconductor memory device capable of...

Details Low power consumption semiconductor memory device capable of... Low power consumption semiconductor memory device capable of...

2004-10-07

2009-10-13

Thai, Tuan V (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

C711S100000, C711S151000, C711S154000

Reexamination Certificate

active

07603535

ABSTRACT:
A semiconductor memory device includes a memory cell core having a plurality of memory cells; a data input/output circuit unit, which sets an input/output data width in response to input/output control signals and inputs/outputs data signals through at least some of a plurality of input/output pads; a pipelined circuit unit, which is connected to the data input/output circuit unit through input/output lines and transmits the data signals between the memory cell core and the data input/output circuit unit in synchronization with predetermined clock signals through an input/output path selected in response to pipeline enable signals; and a plurality of selection units, which are connected to the input/output lines through external common data lines and connect some of the input/output lines to the data input/output circuit unit in response to selection control signals. The semiconductor memory device and the data input/output method enable selective changes to the input/output data width, as needed, and selectively operate a pipelined circuit based on a set input/output data width.

REFERENCES:
patent: 5923615 (1999-07-01), Leach et al.
patent: 2003/0214854 (2003-11-01), Imondi et al.

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