Low power consumption data input/output circuit of embedded...

Details Low power consumption data input/output circuit of embedded... Low power consumption data input/output circuit of embedded...

2007-09-11

2007-09-11

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

C365S230030, C365S230060

Reexamination Certificate

active

10874604

ABSTRACT:
A low power consumption data input/output circuit and method includes input/output lines, bit line sense amplifying unit groups, and data input/output units. Each pair of the input/output lines is arranged in each sub memory cell block. The bit line sense amplifying unit groups are connected between the sub memory cell blocks and the pairs of input/output lines and mutually transmit data signals between the sub memory cell blocks and the pairs of input/output lines in response to first control signals. Each data input/output unit is connected to each of input/output line groups each including a first predetermined number of input/output line pairs, selects as a data output path some of the input/output lines included in each input/output line group, pre-discharges the residual input/output lines to a ground voltage, and receives and transmits the data signals to the cell blocks via the selected input/output lines.

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patent: 6542428 (2003-04-01), Hidaka
patent: 6906974 (2005-06-01), Jeung

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