Static information storage and retrieval – Read/write circuit – Multiplexing
Patent
1995-08-31
1996-07-16
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Multiplexing
365221, 36523002, 36523008, 365233, G11C 700, G11C 800
Patent
active
055373534
ABSTRACT:
A memory device 200 which includes a multiplexed address/data input/output 230. Circuitry 200 is based around an array 201 of memory cells and includes circuitry 202, 204 for addressing at least one of the cells in the array in response to at least one address bit and circuitry 208, 210, 211, 212 for exchanging data with an addressed one of the cells. Memory device 200 also includes control circuitry 206 operable to pass an address bit presented at the multiplexed input/output to the circuitry for addressing during a first time period and allow for the exchange of data between the circuitry for exchanging and multiplexed input/output during a second time period.
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Mohan Rao G. R.
Sharma Sudhir
Taylor Ronald T.
Cirrus Logic Inc.
Nelms David C.
Phan Trong
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