Low leakage Ioff and overvoltage Ioz circuit

Details Low leakage Ioff and overvoltage Ioz circuit Low leakage Ioff and overvoltage Ioz circuit

2005-09-06

2005-09-06

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

C326S058000, C326S081000

Reexamination Certificate

active

06940305

ABSTRACT:
A blocking circuit technique achieves very low Ioff and Ioz leakage in low power digital logic devices that incorporate Ioff and overvoltage tolerance. The blocking circuit employs a diode-connected P-channel device in parallel with a PN diode. The diode-connected P-channel device provides enough forward leakage in the subthreshold region to keep Ioz through the upper output driver to a very low level (0.2 uA typical). Further, both the diode-connected P-channel device and the PN diode together provide enough reverse blocking capability to keep Ioff to a very low level (0.2 uA typical).

REFERENCES:
patent: 5450025 (1995-09-01), Shay
patent: 5546021 (1996-08-01), Bizuneh et al.
patent: 6265926 (2001-07-01), Wong

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