Low error propagation rate 32/34 trellis code

Details Low error propagation rate 32/34 trellis code Low error propagation rate 32/34 trellis code

2006-11-14

2006-11-14

Lamarre, Guy (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S800000

Reexamination Certificate

active

07137056

ABSTRACT:
The present invention relates to a coding system characterized by various combinations of the following properties: 1) Even parity at the output of d of the precoder; 2) A coding rate of 32/34; 3) At least 9 ones per codeword; 4) No more than 13 consecutive zeros in the stream of encoded data (G=13); 5) No more than 13 consecutive zeros in any run of every-other-bit in the stream of codewords (I=13); 6) For closed error events in y or y′ having squared-distance≦(1 to 1.5)×dmfb2in the detector, the decoder produces at most 4 corresponding erroneous data bytes; 7) Decoding of a 34 bit codeword may begin when 19 of its bits have been received; 8) If the Viterbi detector108outputs Non-Return to Zero (NRZ) symbols, then its output is filtered by (1⊕D^2) before being decoded, but if the Viterbi detector outputs NRZ Inverter (NRZI) symbols, then its output is decoded directly; and 9) The even parity is on NRZ symbols.

REFERENCES:
patent: 4486739 (1984-12-01), Franaszek et al.
patent: 4618955 (1986-10-01), Sharpe et al.
patent: 6456208 (2002-09-01), Nazari et al.
patent: 6753797 (2004-06-01), Bliss et al.
patent: 6920604 (2005-07-01), Coakeley et al.

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