Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-08-05
2000-06-06
Tu, Trinh L.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714815, 327161, G11R 3128
Patent
active
060732598
ABSTRACT:
Automatic test equipment for semiconductor devices. The automatic test equipment contains numerous channels of electronic circuitry in which precisely timed test signals are generated. Significant advantages in both cost and size are achieved by incorporating multiple channels on one integrated circuit chip. To allow this level of integration without degrading timing accuracy, a series of design techniques are employed. These techniques include the use of guard rings and guard layers, placement of circuit elements in relation to the guard rings and guard layers, separate signal traces for power and ground for each channel, and circuit designs that allow the voltage across a filter capacitor to define a correction signal. Another feature of the disclosed embodiment is a fine delay element design that can be controlled for delay variations and incorporates calibration features. A further disclosed feature is circuitry that allows the tester to have a short refire recovery time.
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Muething, Jr. Gerald F.
Sartschev Ronald A.
Teradyne, Inc.
Tu Trinh L.
Walsh Edmund J.
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